If your system requirements include a custom board, or if you wish to push the performance limits of technology beyond whats available off-the-shelf, let our engineers design a cost-effective solution thats ideal for your application.
Whether its a PCI-bus board, companion board to an existing system, or a stand-alone buffer or accelerator, weve been there and provided world-class designs enabling our clients to out-perform the competition.
Heres a sample of some of our recent projects:
PCI-Bus Video Buffer-Controller
This board stored over 1600 frames of SXGA image data in 256MB (expandable to 1GB) of on-board PC-100 SDRAM for high-speed drive of miniature FLC (Ferro-electric Liquid Crystal) flat panel 1280x1024 pixel displays. This system enabled high-speed display frame updates as well as programmable image rotation lists for a wide range of applications, including optical computing and holographic data processing. Video data rates were 60 MHz on a 64-bit bus for a peak bandwidth of 480 MB/s.
PCI-Bus Single-Board Optical Correlator
This groundbreaking system incorporated a proprietary optical correlator chip, which integrated FLC (Ferro-electric Liquid Crystal) image display with CMOS imager for capturing the resultant correlation. Image data was digitized to 10-bits at 40 MHz on four parallel imager channels.
Liquid Crystal Display-Remote Head Board
Utilizing high-speed data multiplexing and clock recovery, this board enabled placement of the display two meters from the buffer system while maintaining 64 bit, 60 MHz data streams. The head board was connected by a small flexible cable by the use of LVDS technology, multiplexing the data at high speed to reduce the connector pin-count and cable size dramatically. Data rates in the cable are on the order of 500 MHz.
Custom FPGA Firmware Solutions
Heres an example of custom firmware targeting the clients existing hardware. VHDL coded FPGA-based real-time SXGA Flat Panel Display formatter:
This Xilinx design converted 1280x1024 raster video to bit-plane format for driving proprietary miniature flat panel displays. Bit-plane format enabled exploiting FLC characteristics for true 24-bit color imaging. It required processing of high-speed (62 MHz) streaming data to video frame buffers. Floorplanning, relative location constraints, and re-entrant routing techniques were used to yield highest possible FPGA performance.
Specialized Single Board Solutions
Evaluation board for an ASIC design house to demonstrate operation of a proprietary 100-MHz Content-Addressable Memory controller chip.
Precision Timing epoch generator for a satellite payload instrument test system.
CCD Camera Circuits
Digital and CCD-driver design for a high-speed camera utilizing custom 512x512 pixel array CCD imager operating up to 1000 frames per second digitizing to 8-bits. Features include user selectable frame rates and electronic shutter speed and connectivity to commercially available PC-based frame grabbers. Non-volatile memory stored user settings for next power-up.
DRAM-based video buffer internal to a 10-bit version of the above camera that stores 1024 contiguous frames of full-resolution video data acquired in real time at up to 1000 frames per second. The memory subsystem consists of 384 Mbytes of commodity EDO DRAM SIMMs for a flexible and cost-effective solution
Digital and CCD-driver design for a camera utilizing a Thomson 1024x1024 pixel array CCD operating at 60 frames per second digitizing to 12-bits. Features include pixel binning, selectable video gain, external synchronization, selectable frame rate and electronic shutter. All configuration options are available via a RS-232 port with custom designed UART on the Xilinx FPGA chip.
Other projects include digital design of a 2048x2048 pixel camera derivative of the above camera and a 400Mbit/s serial coaxial interface for remote camera applications of 100 feet or more utilizing HP G-Link chip set.
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